Mode 3: In mode 3 (single-chip mode), when the host interface enable bit (HIE) is cleared to 0 in
the system control register (SYSCR), port 3 is a general-purpose input/output port. A pin becomes
an output pin when its P3DDR bit is set to 1, and an input pin when this bit is cleared to 0.
When the HIE bit is set to 1, selecting slave mode, port 3 becomes the host interface data bus
(HDB7 to HDB0). For details, see section 14, Host Interface.
Figure 7.11 shows the pin functions in mode 3.
P37 (input/output)/HDB7 (input/output)
P36 (input/output)/HDB6 (input/output)
P35 (input/output)/HDB5 (input/output)
P34 (input/output)/HDB4 (input/output)
Port 3
P33 (input/output)/HDB3 (input/output)
P32 (input/output)/HDB2 (input/output)
P31 (input/output)/HDB1 (input/output)
P30 (input/output)/HDB0 (input/output)
Figure 7.11 Pin Functions in Mode 3 (Port 3)
7.4.4
Input Pull-Up Transistors
Port 3 has built-in programmable input pull-up transistors that are available in mode 3. The pull-up
for each bit can be turned on and off individually. To turn on an input pull-up in mode 3, set the
corresponding P3PCR bit to 1 and clear the corresponding P3DDR bit to 0. P3PCR is cleared to
H'00 by a reset and in hardware standby mode, turning all input pull-ups off. In software standby
mode, the previous state is maintained.
Table 7.7 indicates the states of the input pull-up transistors in each operating mode.
Table 7.7 States of Input Pull-Up Transistors (Port 3)
Mode
Reset
Off
Hardware Standby
Software Standby
Other Operating Modes
1
2
3
Off
Off
Off
Off
Off
Off
Off
Off
Off
On/off
On/off
Notes: Off:
The input pull-up transistor is always off.
On/off: The input pull-up transistor is on if P3PCR = 1 and P3DDR = 0, but off otherwise.
120
HITACHI [ HITACHI SEMICONDUCTOR ]
