Preface
The H8S/2138 Series and H8S/2134 Series comprise high-performance microcomputers with a
32-bit H8S/2000 CPU core, and a set of on-chip supporting functions required for system
configuration.
The H8S/2000 CPU can execute basic instructions in one state, and is provided with sixteen
internal 16-bit general registers with a 32-bit configuration, and a concise and optimized
instruction set. The CPU can handle a 16-Mbyte linear address space (architecturally 4 Gbytes).
Programs based on the high-level language C can also be run efficiently.
Single-power-supply flash memory (F-ZTAT™*) and mask ROM versions are available,
providing a quick and flexible response to conditions from ramp-up through full-scale volume
production, even for applications with frequently changing specifications.
On-chip peripheral functions include a 16-bit free-running timer (FRT), 8-bit timer (TMR),
watchdog timer (WDT), two PWM timers (PWM and PWMX), a serial communication interface
(SCI, IrDA), host interface (HIF), D/A converter (DAC), A/D converter (ADC), and I/O ports. An
I
2
C bus interface (IIC) can also be incorporated as an option.
An on-chip data transfer controller (DTC) is also provided, enabling high-speed data transfer
without CPU intervention.
The H8S/2138 Series has all the above on-chip supporting functions, and can also be provided
with an IIC module as an option. The H8S/2134 Series comprises reduced-function versions, with
fewer TMR channels, and no PWM, HIF, IIC, or DTC modules.
Use of the H8S/2138 or H8S/2134 Series enables compact, high-performance systems to be
implemented easily. The comprehensive PC-related interface functions and 16
×
8 matrix key-
scan functions are ideal for applications such as notebook PC keyboard control and intelligent
battery and power supply control, while the various timer functions and their interconnectability
(timer connection), plus the interlinked operation of the I
2
C bus interface and data transfer
controller (DTC), in particular, make these devices ideal for use in PC monitors. In addition, the
combination of F-ZTAT™* and reduced-function versions is ideal for applications such as system
units in which on-chip program memory is essential to meet performance requirements, product
start-up times are short, and program modifications may be necessary after end-product assembly.
This manual describes the hardware of the H8S/2138 Series and H8S/2134 Series. Refer to the
H8S/2600 Series and H8S/2000 Series Programming Manual
for a detailed description of the
instruction set.
Note: * F-ZTAT™ (Flexible-ZTAT) is a trademark of Hitachi, Ltd.
HITACHI [ HITACHI SEMICONDUCTOR ]
