HANBit
HSD32M32M4V
+3.3V
V =1.4V
tt
1200W
50pF*
50W
DOUT
DOUT
870W
Z0=50W
50pF
V
V
(DC) = 2.4V, I = -2mA
OH
OH
(DC) = 0.4V, I = 2mA
OL
OL
(Fig. 2) AC output load circuit
(Fig. 1) DC output load circuit
OPERATING AC PARAMETER
(AC operating conditions unless otherwise noted)
VERSION
PARAMETER
SYMBOL
UNIT
NOTE
-A
15
20
20
45
-8
-H
20
20
20
50
-L
20
20
20
50
Row active to row active delay
RAS to CAS delay
tRRD(min)
tRP(min)
16
20
20
48
ns
ns
ns
ns
1
1
1
1
Row precharge time
tRP(min)
tRAS(min)
tRAS(max)
Row active time
100
2
ns
Row cycle time
tRC(min)
tRDL(min)
tDAL(min)
tCDL(min)
tBDL(min)
tCCD(min)
65
68
70
70
ns
CLK
-
1
2.5
5
Last data in to row precharge
Last data in to Active delay
Last data in to new col. address delay
Last data in to burst stop
2 CLK + 20 ns
1
1
1
2
CLK
CLK
CLK
2
2
Col. address to col. address delay
3
CAS latency=3
CAS latency=2
Number of valid output data
ea
4
-
1
Notes :
1. The minimum number of clock cycles is determined by dividing the minimum time required with clock cycle time and
then rounding off to the next higher integer.
2. Minimum delay is required to complete write.
3. All parts allow every cycle column address change.
4. In case of row precharge interrupt, auto precharge and read burst stop.
5. For -8/H/L, tRDL=1CLK and tDAL=1CLK+20ns is also supported .
(Recommand : tRDL=2CLK and tDAL=2CLK & 20ns.)
URL:www.hbe.co.kr
REV.1.0 (August.2002)
- 6 -
HANBit Electronics Co.,Ltd