GS9090 Data Sheet
The registers that determine the signals present on the STAT [3:0] pins are labelled
STAT0_CONFIG[2:0], STAT1_CONFIG[2:0], STAT2_CONFIG[2:0], and
STAT3_CONFIG[2:0] respectively. Table 3-18 shows the setting of the
IO_CONFIG registers for each of the available output signals.
Table 3-18: IO_CONFIG Settings
Function
I/O
IO_CONFIG Setting
H
Output
Output
Output
Output
Output
Output
Output
Output
000b
001b
010b
011b
100b
101b
110b
111b
V
F
FIFO_LD
ANC_DETECT
EDH_DETECT
FIFO_FULL
FIFO_EMPTY
The default setting for each IO_CONFIG register depends on the configuration of
the device and the internal FIFO mode selected. This is shown in Table 3-19.
NOTE: Signals not relevant to the particular mode of operation will be ignored and
be high-impedance when programmed to be displayed on the STAT[3:0] pins. For
example, the FIFO_FULL and FIFO_EMPTY flags can only be displayed on the
STAT[3:0] pins when the device is in DVB-ASI mode. If the FIFO_FULL or
FIFO_EMPTY value (110 and 111 respectively) is programmed into the
IO_CONFIG registers when the device is in SMPTE mode, the value will be
ignored and the I/O pin will be set to a high impedance state.
Table 3-19: STAT [3:0] Output Default Configuration
Device Configuration
IO_CONFIG
Register
I/O
Function
Default IO_CONFIG
Setting
SMPTE Functionality
SMPTE_BYPASS = HIGH
DVB_ASI = LOW
FIFO: Video Mode or Ancillary Data
Extraction Mode
STAT0_CONFIG
STAT1_CONFIG
STAT2_CONFIG
STAT3_CONFIG
STAT0_CONFIG
STAT1_CONFIG
STAT2_CONFIG
STAT3_CONFIG
Output
Output
Output
Output
Output
Output
Output
Output
H
000b
001b
010b
011b
110b
111b
000b
000b
V
F
FIFO_LD
FIFO_FULL
FIFO_EMPTY
High Z
DVB-ASI
DVB_ASI = HIGH
FIFO: DVB-ASI Mode
High Z
28201 - 1 July 2005
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