GS9090 Data Sheet
3.6.1 SMPTE Descrambling and Word Alignment
After serial-to-parallel conversion, the internal 10-bit data bus is fed to the SMPTE
descramble and word alignment internal block. The function of this block is to carry
out NRZI-to-NRZ decoding, descrambling according to SMPTE 259M-C, and word
alignment of the data to the TRS sync words.
NOTE: When 8-bit data is embedded in the 10-bit SMPTE signal, the two LSBs
(DOUT[1:0]) must be set to zero for word alignment to work correctly.
Word alignment occurs when two consecutive valid TRS words (SAV and EAV
inclusive) with the same bit alignment have been detected (1 video line).
In normal operation, re-synchronization of the word alignment process will only
take place when two consecutive identical TRS word positions have been
detected. When automatic or manual switch line lock handling occurs (see Switch
Line Lock Handling on page 27), word alignment re-synchronization will occur on
the next received TRS code word.
The device will drop out of SMPTE mode, only after 6 consecutive missing TRS
timing words.
3.6.2 Internal Flywheel
The GS9090 has an internal flywheel for the generation of internal / external timing
signals, the detection and correction of certain error conditions, and the automatic
detection of video standards. The flywheel is only operational in SMPTE mode.
The flywheel 'learns' the video standard by monitoring the horizontal and vertical
reference information contained in the TRS ID words of the received video stream.
Full synchronization of the flywheel to the received video standard therefore
requires one complete video frame.
Once synchronization has been achieved, the flywheel will continue to monitor the
received TRS timing information to maintain synchronization.
The FW_EN input pin controls the synchronization mechanism of the flywheel.
When this input signal is LOW, the flywheel will re-synchronize all pixel and line
based counters on every received TRS ID word.
When FW_EN is held HIGH, re-synchronization of the pixel and line based
counters will take place after 3 consecutive video lines with identical TRS timing
are identified. This provides a measure of noise immunity for output timing signal
generation.
The flywheel will be disabled should the LOCKED signal or RESET signal be LOW.
This will occur regardless of the setting of the FW_EN pin.
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