GS9090 Data Sheet
3.6.4 HVF Timing Signal Generation
The GS9090 extracts critical timing parameters from either the received TRS
signals (FW_EN = LOW) or from the internal flywheel-timing generator (FW_EN =
HIGH).
Horizontal blanking period (H), vertical blanking period (V), and field odd / even
timing (F) are extracted and are available for output on any of the multi-function
output port pins, if so programmed (see Programmable Multi-Function Outputs on
page 56).
The H signal timing is configurable via the H_CONFIG bit of the internal
IOPROC_DISABLE register as either active line-based blanking, or TRS-based
blanking (see Table 3-14 in Error Correction and Insertion on page 43).
The default setting of this bit (after RESET has been asserted) is LOW.
Active line-based blanking is enabled when the H_CONFIG bit is set LOW. In this
mode, the H output is HIGH for the entire horizontal blanking period, including the
EAV and SAV TRS words. This is the default H timing used by the device.
When H_CONFIG is set HIGH, TRS based blanking is enabled. In this case, the H
output will be HIGH for the entire horizontal blanking period as indicated by the H
bit in the received TRS ID words.
The timing of these signals is shown in Figure 3-3.
NOTE 1: When the internal FIFO is configured for video mode, the H, V, and F
signals will be timed to the data output from the FIFO (see Video Mode on
page 46).
NOTE 2: When the GS9090 is configured for Low-latency mode, the H, V, and F
output timing will be TRS-based only as shown in GS9090 Low-latency Mode on
page 58. Active line-based timing is not available in this mode, and the setting of
the H_CONFIG host interface bit will be ignored.
PCLK
XYZ
(eav)
XYZ
(sav)
Y/Cr/Cb DATA OUT
3FF
000
000
3FF
000
000
H
V
F
H SIGNAL TIMING:
H_CONFIG = LOW (Default)
H_CONFIG = HIGH
Figure 3-3: H,V,F Timing
28201 - 1 July 2005
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