GS9060 Data Sheet
Application Host
SCLK
GS9060
SCLK
SDIN
SDOUT
CS
CS
SDIN
SDOUT
Figure 3-8: Gennum Serial Peripheral Interface (GSPI)
3.12.1 Command Word Description
The command word is transmitted MSB first and contains a read/write bit, nine
reserved bits and a 6-bit register address. Set R/W = '1' to read and R/W = '0' to
write from the GSPI.
Command words are clocked into the GS9060 on the rising edge of the serial clock
SCLK. The appropriate chip select, CS, signal must be asserted low a minimum of
1.5ns (t in Figure 3-11 and Figure 3-12) before the first clock edge to ensure
0
proper operation.
Each command word must be followed by only one data word to ensure proper
operation.
MSB
LSB
R/W
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
A5
A4
A3
A2
A1
A0
Figure 3-9: Command Word
MSB
D15
LSB
D9
D7
D6
D4
D3
D14
D13
D12
D11
D10
D8
D5
D2
D1
D0
Figure 3-10: Data Word
3.12.2 Data Read and Write Timing
Read and write mode timing for the GSPI interface is shown in Figure 3-11 and
Figure 3-12 respectively. The maximum SCLK frequency allowed is 6.6MHz.
When writing to the registers via the GSPI, the MSB of the data word may be
presented to SDIN immediately following the falling edge of the LSB of the
command word. All SDIN data is sampled on the rising edge of SCLK.
When reading from the registers via the GSPI, the MSB of the data word will be
available on SDOUT 12ns (t in Figure 3-11) following the falling edge of the LSB
5
of the command word, and thus may be read by the host on the very next rising
edge of the clock. The remaining bits are clocked out by the GS9060 on the
negative edges of SCLK.
22208 - 8 January 2007
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