GS9060 Data Sheet
Alternatively, the serial digital output can drive 800mVp-p into a 50Ω load. Since
the output swing is reduced by a factor of approximately one third when the smaller
load is used, the RSET resistor must be 187Ω to obtain 800mVp-p.
1000
900
800
700
600
75Ω load
500
50Ω load
400
300
300 350 400 450 500 550
650 700
200 250
600
RSET(Ω)
Figure 3-1: Serial Digital Loop-Through Output Swing
3.4.2 Reclocker Bypass Control
The serial digital loop-through output may be either a buffered version of the serial
digital input signal, or a reclocked version of that signal.
The application layer may choose the reclocked output by setting RC_BYP to logic
HIGH. If RC_BYP is set LOW, the data stream will bypass the internal reclocker
and the serial digital output will be a buffered version of the input.
3.4.3 Serial Digital Output Mute
The GS9060 will automatically mute the serial digital loop-through output when the
internal carrier_detect signal indicates an invalid serial input.
The loop-through output will also be muted when SDO/SDO is selected as
reclocked, (RC_BYP = HIGH), but the lock detect block has failed to lock to the
data stream, (LOCKED = LOW).
Table 3-1 summarizes the possible states of the serial digital loop-through output
data stream.
Table 3-1: Serial Digital Loop-Through Output Status
SDO
CD
Locked
RC_BYP
RECLOCKED
BUFFERED
MUTED
LOW
LOW
LOW
HIGH
HIGH
X
HIGH
LOW
HIGH
X
LOW
LOW*
MUTED
*NOTE: LOCKED = HIGH if and only if CD = LOW
22208 - 8 January 2007
27 of 61
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