GS9060 Data Sheet
3.3.1 External VCO
The GS9060 requires the external GO1555/GO1525* Voltage Controlled Oscillator
as part of the reclocker's phase-locked loop. This external VCO implementation
was chosen to ensure high quality reclocking.
Power for the external VCO is generated entirely by the GS9060 from an integrated
voltage regulator. The internal regulator uses +3.3V DC supplied via the CP_VDD
/ CP_GND pins to provide +2.5V DC on the VCO_VCC / VCO_GND pins.
The control voltage to the VCO is output from the GS9060 on the LF pin and
requires 4.7kΩ pull-up and pull-down resistors to ensure correct operation.
The GO1555/GO1525* produces a reference signal for the reclocker, input on the
VCO pin of the GS9060. Both LF and VCO signals should be referenced to the
supplied VCO_GND as shown in the recommended application circuit of
Section 4.1 on page 56.
*For new designs use GO1555
3.3.2 Loop Bandwidth
The loop bandwidth of the integrated reclocker is nominally 1.4MHz, but may be
increased or decreased via the LB_CONT pin. It is recommended that this pin be
connected to VCO_GND through 39.2kΩ to maximize the input jitter tolerance of
the device.
3.4 Serial Digital Loop-Through Output
The GS9060 contains an integrated current mode differential serial digital cable
driver with automatic slew rate control. When enabled, this serial digital output
provides an active loop-through of the input signal.
To enable the loop-through output, SDO_EN/DIS must be set HIGH by the
application layer. Setting the SDO_EN/DIS signal LOW will cause the SDO and
SDO output pins to become high impedance, resulting in reduced device power
consumption.
With suitable external return loss matching circuitry, the GS9060's loop-through
outputs will provide a minimum output return loss of -15dB at 270Mb/s.
The integrated cable driver uses a separate power supply of +1.8V DC supplied via
the CD_VDD and CD_GND pins.
3.4.1 Output Swing
Nominally, the voltage swing of the serial digital loop-through output is 800mV
p-p
single-ended into a 75Ω load. This is set externally by connecting the RSET pin to
CD_VDD through 281Ω.
The loop-through output swing may be decreased by increasing the value of the
RSET resistor. The relationship is approximated by the curve shown in Figure 3-1.
22208 - 8 January 2007
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