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GS9020ACTVE3 参数 Datasheet PDF下载

GS9020ACTVE3图片预览
型号: GS9020ACTVE3
PDF下载: 下载PDF文件 查看货源
内容描述: GENLINX -TM II GS9020A串行数字视频输入处理器 [GENLINX -TM II GS9020A Serial Digital Video Input Processor]
分类和应用: 消费电路商用集成电路
文件页数/大小: 31 页 / 403 K
品牌: GENNUM [ GENNUM CORPORATION ]
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5.0 HOST INTERFACE TABLES  
PIN  
LOGIC OPR  
HOST BIT  
PIN  
LOGIC OPR  
HOST BIT  
HOSTIF_MODE  
TRS_INSERT  
The HOST INTERFACE TABLES (HOSTIF) refer to memory  
locations within the GS9020A which store functional  
information about the device. There are two tables, a write  
table and read table.  
In the case where the input signal disappears, TRSs will  
continue to be inserted based on the last detected  
standard. Further, if a TRS is already in the correct location,  
it will be overwritten which may have the effect of correcting  
the TRS-ID word.  
The write table is organized into 15 word locations (each 8  
bits wide) as shown in Table 2 and is used to set various  
configuration/flag bits. The read table is organized into 23  
word locations (each 8 bits wide) as shown in Table 3 and is  
used to read status information from the device.  
TRS insertion will function incorrectly if the flywheel is  
disabled. Thus if the flywheel is disabled the TRS_INSERT  
function should be disabled as well.  
4.5 Clipping And TRS Blanking/Insertion  
The HOSTIF tables can be accessed via an I²C (Inter-  
Integrated Circuit) serial interface or an 8-bit parallel  
interface. The HOSTIF_MODE pin selects which interface is  
used. If the HOSTIF_MODE pin is HIGH, the HOSTIF  
operates in I²C mode. If the HOSTIF_MODE pin is LOW, the  
HOSTIF operates in parallel mode.  
PIN  
LOGIC OPR  
HOST BIT  
601_CLIP  
CLIP_TRS  
OR  
TRS_BLANK  
TRS_INSERT  
Note that many bits stored in the tables are also available  
as device pins. Bits in the write table that have a default  
value of 0 are logically ORed with the corresponding pin.  
Write table control bits VBLANKS/L and BLANK_EN, which  
have a default value of 1, are logically ANDed with the  
corresponding pin. However, write table control bit  
ANC_CHKSM, which has a default value of 1, is logically  
ORed with the corresponding pin. Therefore, to use the  
ANC_CHKSM pin, the ANC_CHKSM control bit must first be  
set to 0.  
Asserting the CLIP_TRS pin HIGH turns on three features  
described above:  
ITU-R-601 Clipping,  
TRS Blanking, and  
TRS Insertion  
These three functions can also be turned on individually  
through the HOSTIF as described above. THE CLIP_TRS  
pin is logically ORed with each of the three bits from the  
HOSTIF table. As a result, as long as the CLIP_TRS pin is  
asserted, these functions cannot be turned off via the  
HOSTIF.  
If the HOST interface is not going to be used, the best way  
to set the related pins is as follows:  
HOSTIF_MODE = LOW  
CS = HIGH  
R/W = HIGH  
4.6 Ancillary Header  
A/D = DON'T CARE (BUT NOT FLOATING)  
P[7:0] = N/C  
PIN  
LOGIC OPR  
HOST BIT  
ANC_HEADER  
Updating of the ANC headers can occur to facilitate 8-bit to  
10-bit conversion. If the ANC_HEADER bit of the HOSTIF  
write table is set HIGH, all 3FC-3FF data values  
corresponding to component ANC headers are remapped  
to 3FF in the output data stream.  
For example, if 8 bit data is input to the device, the ANC  
header of 00, FF, FF will appear as 000, 3FC, 3FC and will  
be remapped to 000, 3FF, 3FF by the GS9020A.  
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