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GS9020ACTVE3 参数 Datasheet PDF下载

GS9020ACTVE3图片预览
型号: GS9020ACTVE3
PDF下载: 下载PDF文件 查看货源
内容描述: GENLINX -TM II GS9020A串行数字视频输入处理器 [GENLINX -TM II GS9020A Serial Digital Video Input Processor]
分类和应用: 消费电路商用集成电路
文件页数/大小: 31 页 / 403 K
品牌: GENNUM [ GENNUM CORPORATION ]
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4. DATA PROCESSING BLOCK  
4.2 ITU-R-601 Clipping  
The GS9020A contains advanced data processing features  
that can simplify system design requirements. These  
include:  
PIN  
LOGIC OPR  
HOST BIT  
601_CLIP  
TRS Blanking,  
ITU-R-601 Clipping  
Data Blanking,  
This feature operates on the active picture portion (as  
defined in RP165) of the data stream only. When the  
601_CLIP bit of the HOSTIF write table is asserted HIGH,  
the device remaps all reserved data words in the active  
picture to values compliant with ITU-R-601. That is, 000-003  
is clipped to 004 and 3FCH-3FFH is clipped to 3FBH.  
TRS Insertion, and  
ANC Header updating  
It is important to note that these processing functions occur  
in the GS9020A in the order listed above.  
4.3 Data Blanking  
When implementing applications which use the EDH core  
(ie. BYPASS_EDH set LOW), TRS blanking, data blanking,  
and TRS insertion will indicate a downstream FF/AP EDH  
error when a 3FCH-3FFH input data value is blanked out or  
overwritten to a value less than 3FBH. As such, users may  
wish to disable data blanking, TRS blanking and TRS  
insertion by setting the BLANK_EN pin HIGH, the CLIP_TRS  
pin LOW, and leaving the corresponding host interface bits  
at their power-on default values when implementing  
applications which use the EDH core.  
PIN  
LOGIC OPR  
HOST BIT  
BLANK_EN  
AND  
BLANK_EN  
Asserting the BLANK_EN pin or the corresponding HOSTIF  
write table bit LOW causes the corresponding input data to  
be forced to blanking levels. This is a dynamic control  
allowing the user to individually select which data words are  
to be blanked. TRS and EDH insertion occurs after data  
blanking so if all these features are being used, the output  
data stream continues to have TRS words and EDH packets  
present, even if the BLANK_EN is constantly held LOW.  
4.1 TRS Blanking  
PIN  
LOGIC OPR  
HOST BIT  
The outgoing EDH packet will contain the correct CRC  
values for the blanked fields since the CRC values are  
calculated and inserted just prior to the data exiting the  
device.  
TRS_BLANK  
When asserted HIGH, TRS_BLANK (HOSTIF write table) will  
blank out any incorrectly positioned TRS words with respect  
to the flywheel. The blanking values used will be  
appropriate for the detected video standard as described  
below in the Data Blanking section. When TRS_INSERT is  
enabled and TRS_BLANK is not, there may be 4 TRSs per  
line in the outgoing data stream during a standard switch.  
Similarly, if TRS_BLANK is enabled and TRS_INSERT is not,  
then there may be 0 TRS per line during a switch. In most  
applications, these features should be either both enabled  
or both disabled to maintain only two TRSs per line. TRS  
blanking will function incorrectly if the flywheel is disabled.  
Thus if the flywheel is disabled the TRS_BLANK function  
should be disabled as well.  
The blanking values in hexi-decimal notation for each  
standard are as follows:  
NTSC/PAL 4:2:2  
NTSC 4ƒsc  
200 040 200 040 (CB:Y:CR:Y)  
0F0  
100  
PAL 4ƒsc  
NTSC/PAL 4:4:4:4  
040 040 040 040 (B:G:R:A)  
200 040 200 040 (CB:Y:CR:A)  
Note that the device must first detect the incoming standard  
in order for the proper blanking values to be inserted.  
4.4 TRS Insertion  
TRS words, based on the internal flywheel, can be inserted  
into the outgoing data stream by asserting HIGH the  
TRS_INSERT bit of the HOSTIF write table. Note that for  
proper TRS insertion, the incoming standard must be  
detected and the flywheel synchronized. That is, the  
GS9020A does NOT provide proper TRS insertion for  
unformatted video data (video without TRS words).  
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