PCLK
XYZ
XYZ
3FF
3FF
000
000
000
000
LUMA DATA OUT
3FF
3FF
000
000
000
000
(eav)
(sav)
XYZ
(eav)
XYZ
(sav)
CHROMA DATA OUT
H
V
F
H:V:F TIMING - HD 20-BIT OUTPUT MODE
PCLK
XYZ
(eav)
XYZ
(eav)
MULTIPLEXED
Y/Cr/Cb DATA OUT
3FF
3FF
000
000
000
000
H
V
F
H:V:F TIMING AT EAV - HD 10-BIT OUTPUT MODE
PCLK
XYZ
(sav)
XYZ
(sav)
MULTIPLEXED
Y/Cr/Cb DATA OUT
3FF
3FF
000
000
000
000
H
V
F
H;V:F TIMING AT SAV - HD 10-BIT OUTPUT MODE
PCLK
3FF
000
000
3FF
000
000
CHROMA DATA OUT
XYZ
(eav)
XYZ
(SAV)
LUMA DATA OUT
H
V
F
H SIGNAL TIMING:
H_CONFIG = LOW
H_CONFIG = HIGH
H:V:F TIMING - SD 20-BIT OUTPUT MODE
PCLK
MULTIPLEXED
XYZ
(eav)
XYZ
(sav)
3FF
000
000
3FF
000
000
Y/Cr/Cb DATA OUT
H
V
F
H:V:F TIMING - SD 10-BIT OUTPUT MODE
Figure 4-3: H, V, F Timing
GS1559 HD-LINX™ II Multi-Rate Deserializer with
Loop-Through Cable Driver
Data Sheet
37 of 71
30572 - 8
July 2008