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GS1559_08 参数 Datasheet PDF下载

GS1559_08图片预览
型号: GS1559_08
PDF下载: 下载PDF文件 查看货源
内容描述: HD- LINX II多速率解串器,带环通电缆驱动器 [HD-LINX II Multi-Rate Deserializer with Loop-Through Cable Driver]
分类和应用: 驱动器
文件页数/大小: 71 页 / 1322 K
品牌: GENNUM [ GENNUM CORPORATION ]
 浏览型号GS1559_08的Datasheet PDF文件第32页浏览型号GS1559_08的Datasheet PDF文件第33页浏览型号GS1559_08的Datasheet PDF文件第34页浏览型号GS1559_08的Datasheet PDF文件第35页浏览型号GS1559_08的Datasheet PDF文件第37页浏览型号GS1559_08的Datasheet PDF文件第38页浏览型号GS1559_08的Datasheet PDF文件第39页浏览型号GS1559_08的Datasheet PDF文件第40页  
Table 4-4: Switch Line Position for Digital Systems (Continued)  
System  
Video Format  
Sampling  
Signal  
Standard  
Parallel  
Interface  
Serial  
Interface  
Switch Line  
No.  
525  
720x483/59.94 (1:1)  
720x483/59.94 (1:1)  
720x483/59.94 (1:1)  
720x483/59.94 (1:1)  
720x576/50 (1:1)  
720x576/50 (1:1)  
720x576/50 (1:1)  
720x576/50 (1:1)  
720x576/50 (1:1)  
960x576/50 (2:1)  
960x576/50 (2:1)  
720x576/50 (2:1)  
720x576/50 (2:1)  
720x576/50 (2:1)  
720x576/50 (2:1)  
720x576/50 (2:1)  
720x576/50 (2:1)  
4:2:2  
4:2:2  
4:2:0  
4:2:0  
4:2:2  
4:2:2  
4:2:2  
4:2:0  
4:2:0  
4:2:2  
4:2:2  
4:4:4:4  
4:4:4:4  
4:4:4:4  
4:4:4:4  
4:2:2  
4:2:2  
293M  
347M  
293M  
349M  
293M  
349M  
347M  
BT.1358  
349M  
BT.1358  
349M  
BT.656  
349M  
347M  
BT.799  
BT.799  
349M  
125M  
344M  
294M  
292M  
294M  
292M  
344M  
BT.1362  
292M  
BT.1362  
292M  
259M  
292M  
344M  
344M  
10  
293M  
10  
293M  
10  
293M  
10  
625  
BT.1358  
BT.1358  
BT.1358  
BT.1358  
BT.1358  
BT.601  
BT.601  
BT.799  
BT.799  
BT.799  
BT.799  
BT.601  
BT.601  
6
6
6
6
6
6, 319  
6, 319  
6, 319  
6, 319  
6, 319  
6, 319  
6, 319  
6, 319  
292M  
259M  
4.7.4 HVF Timing Signal Generation  
The GS1559 extracts critical timing parameters from either the received TRS signals  
(FW_EN/DIS = LOW), or from the internal Flywheel-Timing Generator (FW_EN/DIS =  
HIGH).  
Horizontal blanking period (H), Vertical blanking period (V), and even/odd Field (F)  
timing are all extracted and presented to the application layer via the H:V:F status  
output pins.  
The H signal timing is configurable via the H_CONFIG bit of the internal  
IOPROC_DISABLE register as either active line based blanking, or TRS based blanking,  
(see Error Correction and Insertion on page 53).  
Active Line Based Blanking is enabled when the H_CONFIG bit is set LOW. In this mode,  
the H output is HIGH for the entire horizontal blanking period, including the EAV and  
SAV TRS words. This is the default H timing used by the device.  
When H_CONFIG is set HIGH, TRS based blanking is enabled. In this case, the H output  
will be HIGH for the entire horizontal blanking period as indicated by the H bit in the  
received TRS ID words.  
The timing of these signals is shown in Figure 4-3.  
GS1559 HD-LINX™ II Multi-Rate Deserializer with  
Loop-Through Cable Driver  
Data Sheet  
36 of 71  
30572 - 8  
July 2008  
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