MB90610A Series
8. Delayed Interrupt Generation Module
The delayed interrupt generation module is used to generate the task switching interrupt. Interrupt requests to
the F2MC-16L CPU can be generated and cleared by software using this module.
(1) Register Configuration
Delayed interrupt generate/
clear decoder
Address: 00009FH
bit 15
—
14
—
13
—
12
—
11
—
10
—
9
8
—
R0
DIRR
(—) (—) (—) (—) (—) (—) (—) (R/W)
Read/write
Initial value
(—) (—) (—) (—) (—) (—) (—)
(0)
(2) Block Diagram
F2MC-16 bus
Delayed interrupt generate/clear decoder
Interrupt latch
39
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