MB90560/565 Series
■ PERIPHERAL FUNCTIONS
1. I/O Ports
• The I/O ports can be used as general-purpose I/O ports (parallel I/O ports) . The MB90560/565 series have
7 ports (51 pins) . The ports share pins with the inputs and outputs of the peripheral functions.
• The port data registers (PDR) are used to output data to the I/O pins and read the data input from the I/O
ports. Similarly, the port direction registers (DDR) set the I/O direction (input or output) for each individual port
bit.
• The following table lists the I/O ports and the peripheral functions with which they share pins.
Pin Name (Port) Pin Name (Peripheral)
Peripheral Function that Shares Pin
Not shared
Port 0
Port 1
P00-P07
P10-P16
P17
INT0-INT6
FRCK
External interrupts
Freerun timer external input
P20-P23
P24-P27
P30-P35
P36, P37
P40
TIN0, TO0, TIN1, TO1 16-bit reload timer 0 and 1
Port 2
Port 3
IN0-IN3
RTO0-RTO5
SIN0, SOT0
SCK0
Input capture 0 to 3
Output compare
UART0
UART0
Port 4
Port 5
P41-P46
P50-P57
P60-P62
PPG0-PPG5
AN0-AN7
8/16-bit PPG timer
8/10-bit A/D converter
UART1
SIN1, SOT1, SCK1
INT7
Port 6
External interrupts
Waveform generator
P63
DTTI
Notes : • Pins P30 to P35 of port 3 can drive a maximum of IOL = 12 mA.
• Port 5 shares pins with the analog inputs. When using port 5 pins as a general-purpose ports, ensure that
the corresponding analog input enable register (ADER) bits are set to “0B”. ADER is initialized to “FFH”
after a reset.
• Block diagram for port 0 and 1 pins
Pull-up resistor
setting register
(PDRx)
Internal
pull-up resistor
PDRx read
Input
Port data
register
(PDRx)
buffer
Input/output
selection circuit
Output
buffer
Port pin
PDRx
write
Port direction
register
Standby control (LPMCR : SPL = "1")
(DDRx)
30