MB90560/565 Series
■ INTERRUPTS, INTERRUT VECTORS, AND INTERRUPT CONTROL REGISTERS
Interrupt Control
Register
EI2OS
Sup-
port
Interrupt Vector
Priori-
ty
Interrupt
No.*
Address
08H FFFFDCH
09H FFFFD8H
0AH FFFFD4H
ICR
Address
×
×
×
Reset
#08
#09
#10
#11
#13
#14
#15
#16
#17
#18
#19
#20
#21
#22
#23
#24
#25
#26
#27
#28
#29
#30
#31
#32
#33
#34
#35
#36
#37
#38
#39
#40
#41
#42
High
INT 9 instruction
Exception
A/D converter conversion complete
Output compare channel 0 match
8/16-bit PPG timer 0 counter borrow
Output compare channel 1 match
8/16-bit PPG timer 1 counter borrow
Output compare channel 2 match
8/16-bit PPG timer 2 counter borrow
Output compare channel 3 match
8/16-bit PPG timer 3 counter borrow
Output compare channel 4 match
8/16-bit PPG timer 4 counter borrow
Output compare channel 5 match
8/16-bit PPG timer 5 counter borrow
DTP/external interrupt channel 0/1 detection
DTP/external interrupt channel 2/3 detection
DTP/external interrupt channel 4/5 detection
DTP/external interrupt channel 6/7 detection
8-bit timer 0/1/2 counter borrow
16-bit reload timer 0 underflow
16-bit freerun timer overflow
16-bit reload timer 1 underflow
Input capture channel 0/1
0BH FFFFD0H ICR00
0000B0H
0000B1H
0DH FFFFC8H
ICR01
0EH FFFFC4H
0FH
FFFFC0H
ICR02
ICR03
ICR04
ICR05
ICR06
ICR07
ICR08
ICR09
ICR10
ICR11
ICR12
ICR13
ICR14
ICR15
0000B2H
0000B3H
0000B4H
0000B5H
0000B6H
0000B7H
0000B8H
0000B9H
0000BAH
0000BBH
0000BCH
0000BDH
0000BEH
0000BFH
10H FFFFBCH
11H
12H
13H
FFFFB8H
FFFFB4H
FFFFB0H
14H FFFFACH
15H
16H
17H
18H
19H
1AH
1BH
FFFFA8H
FFFFA4H
FFFFA0H
FFFF9CH
FFFF98H
FFFF94H
FFFF90H
1CH FFFF8CH
×
×
1DH
1EH
1FH
20H
21H
22H
23H
24H
25H
26H
27H
28H
29H
2AH
FFFF88H
FFFF84H
FFFF80H
FFFF7CH
FFFF78H
FFFF74H
FFFF70H
FFFF6CH
FFFF68H
FFFF64H
FFFF60H
FFFF5CH
FFFF58H
FFFF54H
×
×
16-bit freerun timer clear
Input capture channel 2/3
Timebase timer
UART1 receive
UART1 send
UART0 receive
UART0 send
×
×
Flash memory status
Delay interrupt output module
Low
28
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