Document Reference No.: FT_000016
VDIP1 Vinculum VNC1L Module Datasheet Version 1.01
Clearance No.: FTDI# 131
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3.6.3 SPI Slave Data Timing Diagrams
Figure 3.5 – SPI Slave Data Timing Diagrams.
Time
T1
T2
T3
T4
T5
T6
Description
SPICLK Period
SPICLK High
SPICLK Low
Input Setup Time
Input Hold Time
Output Hold Time
Min
83
20
20
10
10
2
-
Typical
-
-
-
-
-
-
-
-
-
-
-
-
-
20
Max
Unit
ns
ns
ns
ns
ns
ns
ns
T7
Output Valid Time
Table 3.6 - SPI Slave Data Timing
Time
T1
T2
T3
T4
T5
T6
RXF#
TXE#
-
-
RXF IRQEn
TXE IRQEn
Description
-
T7
Table 3.7 - SPI Slave Status Register (ADD=’1’)
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