JTAG
12.1 JTAG DC Electrical Characteristics
Table 43 provides the DC electrical characteristics for the JTAG interface.
Table 43. JTAG DC Electrical Characteristics
1
Parameter
Symbol
Min
Max
Unit
High-level input voltage
V
2
–0.3
—
OV + 0.3
V
V
IH
DD
Low-level input voltage
V
I
0.8
±5
—
IL
1
Input current (V
= 0 V or V = V
)
μA
V
IN
IN
DD
IN
High-level output voltage (OV = min, I = –2 mA)
V
OH
2.4
—
DD
OH
Low-level output voltage (OV = min, I = 2 mA)
V
OL
0.4
V
DD
OL
Note:
1. Note that the symbol V , in this case, represents the OV .
IN
IN
12.2 JTAG AC Electrical Specifications
Table 44 provides the JTAG AC timing specifications as defined in Figure 30 through Figure 32.
1
Table 44. JTAG AC Timing Specifications (Independent of SYSCLK)
2
Parameter
Symbol
Min
Max
Unit
Notes
JTAG external clock frequency of operation
JTAG external clock cycle time
JTAG external clock pulse width measured at 1.4 V
JTAG external clock rise and fall times
TRST assert time
f
0
33.3
—
MHz
ns
—
—
—
6
JTG
t
30
15
0
JTG
t
—
ns
JTKHKL
t
& t
2
ns
JTGR
JTGF
t
25
—
ns
3
TRST
Input setup times:
ns
Boundary-scan data
t
t
4
0
—
—
4
4
5
5
JTDVKH
TMS, TDI
JTIVKH
Input hold times:
Valid times:
ns
ns
ns
Boundary-scan data
TMS, TDI
t
20
25
—
—
JTDXKH
t
JTIXKH
Boundary-scan data
TDO
t
t
4
4
20
25
JTKLDV
JTKLOV
Output hold times:
Boundary-scan data
TDO
t
t
30
30
—
—
JTKLDX
JTKLOX
MPC8548E PowerQUICC™ III Integrated Processor Hardware Specifications, Rev. 6
Freescale Semiconductor
52
FREESCALE [ Freescale ]
