Package and Pin Listings
Table 56. MPC8347EA (PBGA) Pinout Listing (continued)
Power
Notes
Signal
Package Pin Number
Pin Type
Supply
LVDD
1
U20, W25
Power for
three-speed
Ethernet #1
and for
LVDD
1
—
Ethernet
management
interface I/O
(2.5 V, 3.3 V)
LVDD
2
V20, Y23
Power for
three-speed
Ethernet #2
I/O (2.5 V,
3.3 V)
LVDD2
—
—
VDD
J11, J12, J15, K10, K11, K12, K13, Power for core
VDD
K14, K15, K16, K17, K18, K19, L10,
L11, L18, L19, M10, M19, N10, N19,
P9, P10, P19, R10, R19, R20, T10,
T19, U10, U19, V10, V11, V18, V19,
W11, W12, W13, W14, W15, W16,
W17, W18
(1.2 V)
OVDD
B27, D3, D11, D19, E15, E23, F5, F8,
PCI, 10/100
OVDD
—
F11, F14, F17, F20, G24, H23, H24, Ethernet, and
J6, J14, J17, J18, K4, L9, L20, L23, other standard
L25, M6, M9, M20, P5, P20, P23, R6,
R9, R24, U23, V4, V6
(3.3 V)
MVREF1
MVREF2
AF19
AE10
I
DDR
reference
voltage
—
—
I
DDR
reference
voltage
No Connection
NC
V1, V2, V5
—
—
—
Notes:
1. This pin is an open-drain signal. A weak pull-up resistor (1 kΩ) should be placed on this pin to OVDD
.
2. This pin is an open-drain signal. A weak pull-up resistor (2–10 kΩ) should be placed on this pin to OVDD
.
3. During reset, this output is actively driven rather than three-stated.
4. These JTAG pins have weak internal pull-up P-FETs that are always enabled.
5. This pin should have a weak pull-up if the chip is in PCI host mode. Follow the PCI specifications.
6. This pin must always be tied to GND.
7. This pin must always be left not connected.
8. Thermal sensitive resistor.
9. It is recommended that MDIC0 be tied to GRD using an 18 Ω resistor and MDIC1 be tied to DDR power using an 18 Ω resistor.
10.TSEC1_TXD[3] is required an external pull-up resistor. For proper functionality of the device, this pin must be pulled up or
actively driven high during a hard reset. No external pull-down resistors are allowed to be attached to this net.
11. A weak pull-up resistor (2–10 kΩ) should be placed on this pin to LVDD1
.
12. For systems that boot from local bus (GPCM)-controlled NOR flash, a pullup on LGPL4 is required.
MPC8347EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 12
Freescale Semiconductor
75