Package and Pin Listings
Table 56. MPC8347EA (PBGA) Pinout Listing (continued)
Power
Supply
Signal
Package Pin Number
Pin Type
Notes
TSEC1_RX_CLK
U26
I
I
LVDD1
LVDD1
OVDD
OVDD
LVDD1
OVDD
OVDD
LVDD1
LVDD1
OVDD
—
—
—
—
—
—
—
10
—
—
TSEC1_RX_DV
U24
TSEC1_RX_ER/GPIO2[26]
TSEC1_RXD[7:4]/GPIO2[22:25]
TSEC1_RXD[3:0]
L28
I/O
I/O
I
M27, M28, N26, N27
W26, W24, Y28, Y27
TSEC1_TX_CLK
N25
I
TSEC1_TXD[7:4]/GPIO2[27:30]
TSEC1_TXD[3:0]
N28, P25, P26, P27
I/O
O
O
I/O
V28, V27, V26, W28
TSEC1_TX_EN
W27
TSEC1_TX_ER/GPIO2[31]
N24
Three-Speed Ethernet Controller (Gigabit Ethernet 2)
TSEC2_COL/GPIO1[21]
TSEC2_CRS/GPIO1[22]
TSEC2_GTX_CLK
P28
I/O
I/O
O
OVDD
LVDD2
LVDD2
LVDD2
LVDD2
OVDD
LVDD2
OVDD
OVDD
OVDD
OVDD
OVDD
LVDD2
OVDD
LVDD2
OVDD
—
—
—
—
—
—
—
—
—
—
—
—
—
—
3
AC28
AC27
TSEC2_RX_CLK
AB25
I
TSEC2_RX_DV/GPIO1[23]
TSEC2_RXD[7:4]/GPIO1[26:29]
TSEC2_RXD[3:0]/GPIO1[13:16]
TSEC2_RX_ER/GPIO1[25]
TSEC2_TXD[7]/GPIO1[31]
AC26
R28, T24, T25, T26
AA25, AA26, AA27, AA28
R25
I/O
I/O
I/O
I/O
I/O
O
T27
TSEC2_TXD[6]/DR_XCVR_TERM_SEL
TSEC2_TXD[5]/DR_UTMI_OPMODE1
TSEC2_TXD[4]/DR_UTMI_OPMODE0
TSEC2_TXD[3:0]/GPIO1[17:20]
TSEC2_TX_ER/GPIO1[24]
T28
U28
O
U27
O
AB26, AB27, AA24, AB28
I/O
I/O
I/O
I/O
R27
AD28
R26
TSEC2_TX_EN/GPIO1[12]
TSEC2_TX_CLK/GPIO1[30]
—
DUART
B4, A4
D5, C5
B5
UART_SOUT[1:2]/MSRCID[0:1]/LSRCID[0:1]
UART_SIN[1:2]/MSRCID[2:3]/LSRCID[2:3]
UART_CTS[1]/MSRCID4/LSRCID4
UART_CTS[2]/MDVAL/LDVAL
O
OVDD
OVDD
OVDD
OVDD
OVDD
—
—
—
—
—
I/O
I/O
I/O
O
A5
UART_RTS[1:2]
D6, C6
MPC8347EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 12
Freescale Semiconductor
72
FREESCALE [ Freescale ]
