Package and Pin Listings
Table 56. MPC8347EA (PBGA) Pinout Listing (continued)
Power
Supply
Signal
Package Pin Number
Pin Type
Notes
General Purpose I/O Timers
GPIO1[0]/DMA_DREQ0/GTM1_TIN1/
GTM2_TIN2
D27
I/O
I/O
OVDD
OVDD
—
—
GPIO1[1]/DMA_DACK0/GTM1_TGATE1/
GTM2_TGATE2
E26
GPIO1[2]/DMA_DDONE0/GTM1_TOUT1
D28
G25
I/O
I/O
OVDD
OVDD
—
—
GPIO1[3]/DMA_DREQ1/GTM1_TIN2/
GTM2_TIN1
GPIO1[4]/DMA_DACK1/GTM1_TGATE2/
GTM2_TGATE1
J24
F26
E27
E28
I/O
I/O
I/O
I/O
OVDD
OVDD
OVDD
OVDD
—
—
—
—
GPIO1[5]/DMA_DDONE1/GTM1_TOUT2/
GTM2_TOUT1
GPIO1[6]/DMA_DREQ2/GTM1_TIN3/
GTM2_TIN4
GPIO1[7]/DMA_DACK2/GTM1_TGATE3/
GTM2_TGATE4
GPIO1[8]/DMA_DDONE2/GTM1_TOUT3
H25
F27
I/O
I/O
OVDD
OVDD
—
—
GPIO1[9]/DMA_DREQ3/GTM1_TIN4/
GTM2_TIN3
GPIO1[10]/DMA_DACK3/
GTM1_TGATE4/GTM2_TGATE3
K24
G26
I/O
I/O
OVDD
OVDD
—
—
GPIO1[11]/DMA_DDONE3/
GTM1_TOUT4/GTM2_TOUT3
USB Port 1
C28
MPH1_D0_ENABLEN/DR_D0_ENABLEN
MPH1_D1_SER_TXD/DR_D1_SER_TXD
MPH1_D2_VMO_SE0/DR_D2_VMO_SE0
MPH1_D3_SPEED/DR_D3_SPEED
MPH1_D4_DP/DR_D4_DP
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
—
—
—
—
—
—
—
—
—
—
F25
B28
C27
D26
MPH1_D5_DM/DR_D5_DM
E25
MPH1_D6_SER_RCV/DR_D6_SER_RCV
MPH1_D7_DRVVBUS/DR_D7_DRVVBUS
MPH1_NXT/DR_SESS_VLD_NXT
C26
D25
B26
MPH1_DIR_DPPULLUP/
E24
I/O
DR_XCVR_SEL_DPPULLUP
MPH1_STP_SUSPEND/
DR_STP_SUSPEND
A27
C25
O
I
OVDD
OVDD
—
—
MPH1_PWRFAULT/
DR_RX_ERROR_PWRFAULT
MPC8347EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 12
Freescale Semiconductor
70
FREESCALE [ Freescale ]
