Peripheral operating requirements and behaviors
Table 20. 12-bit ADC characteristics (VREFH = VDDA, VREFL = VSSA) (continued)
Symbol Description
Conditions1
Min.
Typ.2
Max.
Unit
Notes
EQ
Quantization
error
• 12-bit modes
—
—
0.5
LSB4
EIL
Input leakage
error
IIn × RAS
mV
IIn =
leakage
current
(refer to
the MCU's
voltage
and current
operating
ratings)
Temp sensor
slope
Across the full temperature
range of the device
—
—
1.715
719
—
—
mV/°C
mV
VTEMP25 Temp sensor
voltage
25 °C
1. All accuracy numbers assume the ADC is calibrated with VREFH = VDDA
2. Typical values assume VDDA = 3.0 V, Temp = 25°C, fADCK = 2.0 MHz unless otherwise stated. Typical values are for
reference only and are not tested in production.
3. The ADC supply current depends on the ADC conversion clock speed, conversion rate and the ADLPC bit (low power).
For lowest power operation the ADLPC bit must be set, the HSC bit must be clear with 1 MHz ADC conversion clock
speed.
4. 1 LSB = (VREFH - VREFL)/2N
5. ADC conversion clock < 16 MHz, Max hardware averaging (AVGE = %1, AVGS = %11)
6.6.2 CMP and 6-bit DAC electrical specifications
Table 21. Comparator and 6-bit DAC electrical specifications
Symbol
VDD
Description
Min.
1.71
—
Typ.
—
Max.
3.6
Unit
V
Supply voltage
IDDHS
Supply current, high-speed mode (EN = 1, PMODE =
1)
—
200
μA
IDDLS
VAIN
VAIO
VH
Supply current, low-speed mode (EN = 1, PMODE = 0)
Analog input voltage
—
VSS
—
—
—
—
20
VDD
20
μA
V
Analog input offset voltage
Analog comparator hysteresis1
• CR0[HYSTCTR] = 00
mV
—
—
—
—
5
—
—
—
—
mV
mV
mV
mV
• CR0[HYSTCTR] = 01
10
20
30
• CR0[HYSTCTR] = 10
• CR0[HYSTCTR] = 11
VCMPOh
VCMPOl
Output high
Output low
VDD – 0.5
—
—
—
—
V
V
0.5
Table continues on the next page...
KL24 Sub-Family Data Sheet Data Sheet, Rev. 3, 9/19/2012.
Freescale Semiconductor, Inc.
33
FREESCALE [ Freescale ]
