欢迎访问ic37.com |
会员登录 免费注册
发布采购

MCHC11F1CFNE2 参数 Datasheet PDF下载

MCHC11F1CFNE2图片预览
型号: MCHC11F1CFNE2
PDF下载: 下载PDF文件 查看货源
内容描述: 技术参数 [Technical Data]
分类和应用: 外围集成电路可编程只读存储器电动程控只读存储器电可擦编程只读存储器
文件页数/大小: 158 页 / 993 K
品牌: FREESCALE [ Freescale ]
 浏览型号MCHC11F1CFNE2的Datasheet PDF文件第93页浏览型号MCHC11F1CFNE2的Datasheet PDF文件第94页浏览型号MCHC11F1CFNE2的Datasheet PDF文件第95页浏览型号MCHC11F1CFNE2的Datasheet PDF文件第96页浏览型号MCHC11F1CFNE2的Datasheet PDF文件第98页浏览型号MCHC11F1CFNE2的Datasheet PDF文件第99页浏览型号MCHC11F1CFNE2的Datasheet PDF文件第100页浏览型号MCHC11F1CFNE2的Datasheet PDF文件第101页  
Freescale Semiconductor, Inc.  
TDRE and TC flags are normally set when the transmitter is first enabled (TE set to  
one). The TDRE flag indicates there is room in the transmit queue to store another  
data character in the TDR. The TIE bit is the local interrupt mask for TDRE. When TIE  
is zero, TDRE must be polled. When TIE and TDRE are one, an interrupt is requested.  
The TC flag indicates the transmitter has completed the queue. The TCIE bit is the lo-  
cal interrupt mask for TC. When TCIE is zero, TC must be polled; when TCIE is one  
and TC is one, an interrupt is requested.  
Writing a zero to TE requests that the transmitter stop when it can. The transmitter  
completes any transmission in progress before actually shutting down. Only an MCU  
reset can cause the transmitter to stop and shut down immediately. If TE is written to  
zero when the transmitter is already idle, the pin reverts to its general-purpose I/O  
function (synchronized to the bit-rate clock). If anything is being transmitted when TE  
is written to zero, that character is completed before the pin reverts to general-purpose  
I/O, but any other characters waiting in the transmit queue are lost. The TC and TDRE  
flags are set at the completion of this last character, even though TE has been dis-  
abled.  
7.7.1 Receiver Flags  
The SCI receiver has five status flags, three of which can generate interrupt requests.  
The status flags are set by the SCI logic in response to specific conditions in the re-  
ceiver. These flags can be read (polled) at any time by software. Refer to Figure 7–4,  
which shows SCI interrupt arbitration.  
When an overrun takes place, the new character is lost, and the character that was in  
its way in the parallel RDR is undisturbed. RDRF is set when a character has been  
received and transferred into the parallel RDR. The OR flag is set instead of RDRF if  
overrun occurs. A new character is ready to be transferred into RDR before a previous  
character is read from RDR.  
The NF and FE flags provide additional information about the character in the RDR,  
but do not generate interrupt requests.  
The last receiver status flag and interrupt source come from the IDLE flag. The RxD  
line is idle if it has constantly been at logic one for a full character time. The IDLE flag  
is set only after the RxD line has been busy and becomes idle, which prevents repeat-  
ed interrupts for the whole time RxD remains idle.  
SERIAL COMMUNICATIONS INTERFACE  
TECHNICAL DATA  
7-11  
For More Information On This Product,  
Go to: www.freescale.com  
 复制成功!