Freescale Semiconductor, Inc.
EXTAL
XTAL
OSCILLATOR
INTERNAL
BUS
CLOCK
(PH2)
AND
CLOCK GENERATOR
(÷4)
÷3
÷4
÷13
SCP1:SCP0
1:1
E
0:0
0:1
1:0
AS
SCR2:SCR1:SCR0
0:0:0
÷2
÷2
÷2
÷2
÷2
÷2
÷2
0:0:1
0:1:0
0:1:1
1:0:0
1:0:1
1:1:0
1:1:1
÷16
SCI
TRANSMIT
BAUD RATE
(1X)
SCI
RECEIVE
BAUD RATE
(16X)
Figure 7-3 SCI Baud Rate Generator Block Diagram
7.7 Status Flags and Interrupts
The SCI transmitter has two status flags. These status flags can be read by software
(polled) to tell when the corresponding condition exists. Alternatively, a local interrupt
enable bit can be set to enable each of these status conditions to generate interrupt
requests when the corresponding condition is present. Status flags are automatically
set by hardware logic conditions, but must be cleared by software, which provides an
interlock mechanism that enables logic to know when software has noticed the status
indication. The software clearing sequence for these flags is automatic — functions
that are normally performed in response to the status flags also satisfy the conditions
of the clearing sequence.
SERIAL COMMUNICATIONS INTERFACE
MC68HC11F1
7-10
TECHNICAL DATA
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