Electrical Characteristics
2.10.4 MII Serial Management Timing Specifications
Table 21. MII Serial Management Channel Signal Timing
Num
Characteristic
Symbol
Min
Max
Unit
E10
E11
E12
E13
E14
E15
MDC cycle time
MDC pulse width
tMDC
400
40
—
25
10
0
—
60
375
—
ns
% tMDC
ns
MDC to MDIO output valid
MDC to MDIO output invalid
MDIO input to MDC setup
MDIO input to MDC hold
ns
—
ns
—
ns
E10
E11
MDC (Output)
MDIO (Output)
MDIO (Input)
E11
E12
E13
Valid Data
E14
E15
Valid Data
Figure 10. MII Serial Management Channel TIming Diagram
2.11 General Purpose I/O Timing
GPIO can be configured for certain pins of the QSPI, DDR Control, timer, UART, Interrupt and USB interfaces. When in GPIO
mode, the timing specification for these pins is given in Table 22 and Figure 11.
The GPIO timing is met under the following load test conditions:
•
•
50 pF / 50 Ω for high drive
25 pF / 25 Ω for low drive
Table 22. GPIO Timing
NUM
Characteristic
Symbol
Min
Max
Unit
G1
G2
G3
G4
CLKOUT High to GPIO Output Valid
CLKOUT High to GPIO Output Invalid
GPIO Input Valid to CLKOUT High
CLKOUT High to GPIO Input Invalid
tCHPOV
tCHPOI
tPVCH
tCHPI
—
1.5
9
10
—
—
—
ns
ns
ns
ns
1.5
MCF52259 ColdFire Microcontroller, Rev. 0
Freescale Semiconductor
39