Electrical Characteristics
MB_CLK
MB1
MB3
MB_A[19:X]
A[19:X]
MB2
ADDRESS
MB_D[7:0] /
MB_A[15:0]
DATA[Y:0]
MB_R/W
MB_ALE
MB_CSn
MB_OE
MB3
MB2
MB3
MB2
Figure 6. Mini-FlexBus Write Timing
2.10 Fast Ethernet Timing Specifications
The following timing specs are defined at the chip I/O pin and must be translated appropriately to arrive at timing
specs/constraints for the physical interface.
2.10.1 Receive Signal Timing Specifications
The following timing specs meet the requirements for MII and 7-Wire style interfaces for a range of transceiver devices.
Table 18. Receive Signal Timing
MII Mode
Num
Characteristic
Unit
Min
Max
—
E1
E2
E3
E4
RXCLK frequency
—
5
25
—
MHz
ns
RXD[n:0], RXDV, RXER to RXCLK setup1
RXCLK to RXD[n:0], RXDV, RXER hold1
RXCLK pulse width high
5
—
ns
35%
35%
65%
65%
RXCLK period
RXCLK period
RXCLK pulse width low
1
In MII mode, n = 3
MCF52259 ColdFire Microcontroller, Rev. 0
Freescale Semiconductor
37
FREESCALE [ Freescale ]
