128 KByte Flash Module (S12FTMRC128K1V1)
Table 13-13. FERCNFG Field Descriptions
Field
Description
1
Double Bit Fault Detect Interrupt Enable — The DFDIE bit controls interrupt generation when a double bit fault
is detected during a Flash block read operation.
DFDIE
0 DFDIF interrupt disabled
1 An interrupt will be requested whenever the DFDIF flag is set (see Section 13.3.2.8)
0
Single Bit Fault Detect Interrupt Enable — The SFDIE bit controls interrupt generation when a single bit fault
is detected during a Flash block read operation.
SFDIE
0 SFDIF interrupt disabled whenever the SFDIF flag is set (see Section 13.3.2.8)
1 An interrupt will be requested whenever the SFDIF flag is set (see Section 13.3.2.8)
13.3.2.7 Flash Status Register (FSTAT)
The FSTAT register reports the operational status of the Flash module.
Offset Module Base + 0x0006
7
6
5
4
3
2
1
0
R
W
0
MGBUSY
RSVD
MGSTAT[1:0]
CCIF
ACCERR
FPVIOL
Reset
1
0
0
0
0
0
0(1)
01
= Unimplemented or Reserved
Figure 13-11. Flash Status Register (FSTAT)
1. Reset value can deviate from the value shown if a double bit fault is detected during the reset sequence (see Section 13.6).
CCIF, ACCERR, and FPVIOL bits are readable and writable, MGBUSY and MGSTAT bits are readable
but not writable, while remaining bits read 0 and are not writable.
Table 13-14. FSTAT Field Descriptions
Field
Description
7
Command Complete Interrupt Flag — The CCIF flag indicates that a Flash command has completed. The
CCIF flag is cleared by writing a 1 to CCIF to launch a command and CCIF will stay low until command
completion or command violation.
CCIF
0 Flash command in progress
1 Flash command has completed
5
Flash Access Error Flag — The ACCERR bit indicates an illegal access has occurred to the Flash memory
caused by either a violation of the command write sequence (see Section 13.4.3.2) or issuing an illegal Flash
command. While ACCERR is set, the CCIF flag cannot be cleared to launch a command. The ACCERR bit is
cleared by writing a 1 to ACCERR. Writing a 0 to the ACCERR bit has no effect on ACCERR.
0 No access error detected
ACCERR
1 Access error detected
4
Flash Protection Violation Flag —The FPVIOL bit indicates an attempt was made to program or erase an
address in a protected area of P-Flash or D-Flash memory during a command write sequence. The FPVIOL
bit is cleared by writing a 1 to FPVIOL. Writing a 0 to the FPVIOL bit has no effect on FPVIOL. While FPVIOL
is set, it is not possible to launch a command or start a command write sequence.
0 No protection violation detected
FPVIOL
1 Protection violation detected
S12P-Family Reference Manual, Rev. 1.13
Freescale Semiconductor
439
FREESCALE [ Freescale ]
