Serial Peripheral Interface (S12SPIV5)
Table 12-9. SPIF Interrupt Flag Clearing Sequence
XFRW Bit
SPIF Interrupt Flag Clearing Sequence
Read SPISR with SPIF == 1 Read SPIDRL
Read SPISR with SPIF == 1
0
then
1
Byte Read SPIDRL (1)
or
then Byte Read SPIDRH (2) Byte Read SPIDRL
or
Word Read (SPIDRH:SPIDRL)
1. Data in SPIDRH is lost in this case.
2. SPIDRH can be read repeatedly without any effect on SPIF. SPIF Flag is cleared only by the read
of SPIDRL after reading SPISR with SPIF == 1.
Table 12-10. SPTEF Interrupt Flag Clearing Sequence
XFRW Bit
SPTEF Interrupt Flag Clearing Sequence
Read SPISR with SPTEF == 1
Write to SPIDRL (1)
then
0
1
Read SPISR with SPTEF == 1
Byte Write to SPIDRL 1(2)
or
thenByte Write to SPIDRH 1(3) Byte Write to SPIDRL 1
or
Word Write to (SPIDRH:SPIDRL) 1
1. Any write to SPIDRH or SPIDRL with SPTEF == 0 is effectively ignored.
2. Data in SPIDRH is undefined in this case.
3. SPIDRH can be written repeatedly without any effect on SPTEF. SPTEF Flag is cleared only by
writing to SPIDRL after reading SPISR with SPTEF == 1.
S12P-Family Reference Manual, Rev. 1.13
Freescale Semiconductor
409
FREESCALE [ Freescale ]
