Device Overview MC9S12P-Family
1.5
Device Memory Map
Table 1-2 shows the device register memory map.
Table 1-2. Device Register Memory Map
Size
(Bytes)
Address
Module
0x0000–0x0009
0x000A–0x000B
0x000C–0x000D
0x000E–0x000F
0x0010–0x0017
0x0018–0x0019
0x001A–0x001B
0x001C–0x001F
0x0020–0x002F
0x0030–0x0033
0x0034–0x003F
0x0040–0x006F
0x0070–0x009F
0x00A0–0x00C7
0x00C8–0x00CF
0x00D0–0x00D7
0x00D8–0x00DF
0x00E0–0x00FF
0x0100–0x0113
0x0114–0x011F
0x0120
PIM (port integration module)
MMC (memory map control)
PIM (port integration module)
Reserved
10
2
2
2
MMC (memory map control)
Reserved
8
2
Device ID register
2
PIM (port integration module)
DBG (debug module)
Reserved
4
16
4
CPMU (clock and power management)
TIM (timer module)
12
48
48
40
8
ATD (analog-to-digital converter 12 bit 10-channel)
PWM (pulse-width modulator 6 channels)
SCI (serial communications interface)
Reserved
8
SPI (serial peripheral interface)
Reserved
8
32
20
12
1
FTMRC control registers
Reserved
INT (interrupt module)
Reserved
0x0121–0x013F
0x0140–0x017F
0x0180–0x023F
0x0240–0x027F
0x0280–0x02BF
0x02C0–0x02EF
0x02F0–0x02FF
0x0300–0x03FF
31
64
192
64
64
48
16
256
CAN
Reserved
PIM (port integration module)
Reserved
Reserved
CPMU (clock and power management )
Reserved
S12P-Family Reference Manual, Rev. 1.13
Freescale Semiconductor
25
FREESCALE [ Freescale ]
