Device Overview MC9S12P-Family
— Initialized out of reset using option bits located in flash memory
Clock monitor supervising the correct function of the oscillator
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1.3.8
Timer (TIM)
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8 x 16-bit channels for input capture or output compare
16-bit free-running counter with 7-bit precision prescaler
1 x 16-bit pulse accumulator
1.3.9
Pulse Width Modulation Module (PWM)
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6 channel x 8-bit or 3 channel x 16-bit pulse width modulator
— Programmable period and duty cycle per channel
— Center-aligned or left-aligned outputs
— Programmable clock select logic with a wide range of frequencies
1.3.10 Controller Area Network Module (MSCAN)
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1 Mbit per second, CAN 2.0 A, B software compatible
— Standard and extended data frames
— 0–8 bytes data length
— Programmable bit rate up to 1 Mbps
Five receive buffers with FIFO storage scheme
Three transmit buffers with internal prioritization
Flexible identifier acceptance filter programmable as:
— 2 x 32-bit
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— 4 x 16-bit
— 8 x 8-bit
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Wakeup with integrated low pass filter option
Loop back for self test
Listen-only mode to monitor CAN bus
Bus-off recovery by software intervention or automatically
16-bit time stamp of transmitted/received messages
1.3.11 Serial Communication Interface Module (SCI)
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Full-duplex or single-wire operation
Standard mark/space non-return-to-zero (NRZ) format
Selectable IrDA 1.4 return-to-zero-inverted (RZI) format with programmable pulse widths
13-bit baud rate selection
S12P-Family Reference Manual, Rev. 1.13
Freescale Semiconductor
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