S12S Debug Module (S12SDBGV2)
6.3.2.8.2
Debug Comparator Address High Register (DBGXAH)
Address: 0x0029
7
6
5
4
3
2
1
0
R
W
0
0
0
0
0
0
0
Bit 17
Bit 16
Reset
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 6-16. Debug Comparator Address High Register (DBGXAH)
The DBGC1_COMRV bits determine which comparator address registers are visible in the 8-byte window
from 0x0028 to 0x002F as shown in Table 6-24.
Table 6-24. Comparator Address Register Visibility
COMRV
00
Visible Comparator
DBGAAH, DBGAAM, DBGAAL
DBGBAH, DBGBAM, DBGBAL
DBGCAH, DBGCAM, DBGCAL
None
01
10
11
Read: Anytime. See Table 6-24 for visible register encoding.
Write: If DBG not armed. See Table 6-24 for visible register encoding.
Table 6-25. DBGXAH Field Descriptions
Field
Description
1–0
Comparator Address High Compare Bits — The Comparator address high compare bits control whether the
Bit[17:16] selected comparator compares the address bus bits [17:16] to a logic one or logic zero.
0 Compare corresponding address bit to a logic zero
1 Compare corresponding address bit to a logic one
6.3.2.8.3
Debug Comparator Address Mid Register (DBGXAM)
Address: 0x002A
7
6
5
4
3
2
1
0
R
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
W
Reset
0
0
0
0
0
0
0
0
Figure 6-17. Debug Comparator Address Mid Register (DBGXAM)
Read: Anytime. See Table 6-24 for visible register encoding.
Write: If DBG not armed. See Table 6-24 for visible register encoding.
S12P-Family Reference Manual, Rev. 1.13
Freescale Semiconductor
171