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MC9S12P64CFT 参数 Datasheet PDF下载

MC9S12P64CFT图片预览
型号: MC9S12P64CFT
PDF下载: 下载PDF文件 查看货源
内容描述: 微控制器 [Microcontrollers]
分类和应用: 微控制器外围集成电路时钟
文件页数/大小: 566 页 / 7414 K
品牌: FREESCALE [ Freescale ]
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Background Debug Module (S12SBDMV1)  
handshake protocol is enabled, the time out between a read command and the data retrieval is disabled.  
Therefore, the host could wait for more then 512 serial clock cycles and still be able to retrieve the data  
from an issued read command. However, once the handshake pulse (ACK pulse) is issued, the time-out  
feature is re-activated, meaning that the target will time out after 512 clock cycles. Therefore, the host  
needs to retrieve the data within a 512 serial clock cycles time frame after the ACK pulse had been issued.  
After that period, the read command is discarded and the data is no longer available for retrieval. Any  
negative edge in the BKGD pin after the time-out period is considered to be a new command or a SYNC  
request.  
Note that whenever a partially issued command, or partially retrieved data, has occurred the time out in the  
serial communication is active. This means that if a time frame higher than 512 serial clock cycles is  
observed between two consecutive negative edges and the command being issued or data being retrieved  
is not complete, a soft-reset will occur causing the partially received command or data retrieved to be  
disregarded. The next negative edge in the BKGD pin, after a soft-reset has occurred, is considered by the  
target as the start of a new BDM command, or the start of a SYNC request pulse.  
S12P-Family Reference Manual, Rev. 1.13  
Freescale Semiconductor  
153  
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