Electrical Characteristics
Table 13. SPI Timing
Symbol
No.
C
Function
Operating frequency
Min
Max
Unit
—
D
Master
Slave
fop
tSPSCK
tLead
tLag
fBus/2048
0
fBus/2
fBus/4
Hz
SPSCK period
Master
Slave
1
2
3
4
5
6
D
D
D
D
D
D
2
4
2048
—
tcyc
tcyc
Enable lead time
Master
Slave
1/2
1
—
—
tSPSCK
tcyc
Enable lag time
Master
Slave
1/2
1
—
—
tSPSCK
tcyc
Clock (SPSCK) high or low time
Master
Slave
tWSPSCK
tcyc – 30
tcyc – 30
1024 tcyc
—
ns
ns
Data setup time (inputs)
Master
Slave
tSU
15
15
—
—
ns
ns
Data hold time (inputs)
Master
Slave
tHI
0
25
—
—
ns
ns
7
8
D
D
Slave access time
ta
—
—
1
1
tcyc
tcyc
Slave MISO disable time
tdis
Data valid (after SPSCK edge)
9
D
D
D
D
Master
Slave
tv
—
—
25
25
ns
ns
Data hold time (outputs)
Master
Slave
10
11
12
tHO
0
0
—
—
ns
ns
Rise time
Input
Output
tRI
tRO
—
—
tcyc – 25
25
ns
ns
Fall time
Input
Output
tFI
tFO
—
—
tcyc – 25
25
ns
ns
MC9S08QE8 Series, Rev. 3
Freescale Semiconductor
Preliminary
21
Subject to Change Without Notice
FREESCALE [ Freescale ]
