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MC9S08QE8 参数 Datasheet PDF下载

MC9S08QE8图片预览
型号: MC9S08QE8
PDF下载: 下载PDF文件 查看货源
内容描述: 8位HCS08中央处理器 [8-Bit HCS08 Central Processor Unit]
分类和应用:
文件页数/大小: 46 页 / 942 K
品牌: FREESCALE [ Freescale ]
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Electrical Characteristics  
Table 10. ICS Frequency Specifications (Temperature Range = –40 to 85°C Ambient) (continued)  
Num  
C
Characteristic  
Symbol  
Min. Typical1 Max.  
Unit  
Total deviation of trimmed DCO output frequency over voltage  
and temperature  
+ 0.5  
Δfdco_t  
%fdco  
8
C
± 2  
-1.0  
± 0.5  
Total deviation of trimmed DCO output frequency over fixed  
voltage and temperature range of 0°C to 70 °C  
Δfdco_t  
tAcquire  
CJitter  
%fdco  
ms  
9
C
C
C
± 1  
1
FLL acquisition time3  
10  
11  
Long term jitter of DCO output clock (averaged over 2-ms  
interval)4  
%fdco  
0.02  
0.2  
1
2
3
Data in Typical column was characterized at 3.0 V, 25°C or is typical recommended value.  
The resulting bus clock frequency should not exceed the maximum specified bus clock frequency of the device.  
This specification applies to any time the FLL reference source or reference divider is changed, trim value changed or changing  
from FLL disabled (FBELP, FBILP) to FLL enabled (FEI, FEE, FBE, FBI). If a crystal/resonator is being used as the reference,  
this specification assumes it is already running.  
4
Jitter is the average deviation from the programmed frequency measured over the specified interval at maximum fBus  
.
Measurements are made with the device powered by filtered supplies and clocked by a stable external clock signal. Noise  
injected into the FLL circuitry via VDD and VSS and variation in crystal oscillator frequency increase the CJitter percentage for a  
given interval.  
1.00%  
0.50%  
0.00%  
-60  
-40  
-20  
0
20  
40  
60  
80  
100  
120  
-0.50%  
-1.00%  
-1.50%  
-2.00%  
Temperature  
Figure 13. Deviation of DCO Output from Trimmed Frequency (20 MHz, 3.0 V)  
3.10 AC Characteristics  
This section describes timing characteristics for each peripheral system.  
MC9S08QE8 Series, Rev. 3  
18  
Preliminary  
Freescale Semiconductor  
Subject to Change Without Notice  
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