FLASH Memory
2.5.7 FLASH Block Protect Register
The FLASH block protect register is implemented as an 8-bit I/O register. The value in this register
determines the starting address of the protected range within the FLASH memory.
Address:
$FE09
Bit 7
6
BPR6
0
5
BPR5
0
4
BPR4
0
3
BPR3
0
2
BPR2
0
1
BPR1
0
Bit 0
BPR0
0
Read:
Write:
Reset:
BPR7
0
Figure 2-5. FLASH Block Protect Register (FLBPR)
BPR[7:0] — FLASH Block Protect Bits
BPR[7:1] represent bits [15:9] of a 16-bit memory address. Bits [8:0] are logic 0’s.
16-bit memory address
Start address of FLASH block protect
0 0 0 0 0 0 0 0 0
BPR[7:1]
BPR0 is used only for BPR[7:0] = $FF, for no block protection.
The resultant 16-bit address is used for specifying the start address of the FLASH memory for block
protection. The FLASH is protected from this start address to the end of FLASH memory, at $FFFF.
With this mechanism, the protect start address can be X000, X200, X400, X0600, X800, XA00, XC00,
or XE00 (at page boundaries — 512 bytes) within the FLASH memory.
Examples of protect start address:
Table 2-2 FLASH Block Protect Range
BPR[7:0]
Protected Range
$00 to $09
The entire FLASH memory is protected.
$0A or $0B
(0000 101x)
$0A00 to $FFFF
$0C00 to $FFFF
$0C or $0D
(0000 110x)
and so on...
$FA or $FB
(1111 1101x)
$FA00 to $FFFF
$FC or $FD or $FE
$FF
$FFCF to $FFFF
The entire FLASH memory is NOT protected.(1)
1. Except for the mask option register ($FFCF) and the 48-byte user vectors
($FFD0–$FFFF). These FLASH locations are always protected.
MC68HC908AP Family Data Sheet, Rev. 4
Freescale Semiconductor
47
FREESCALE [ Freescale ]
