Freescale Semiconductor, Inc.
Serial Communications Interface (SCI)
17.5.3 Receiver
Figure 17-5 shows the structure of the SCI receiver.
INTERNAL BUS
SCR1
SCP1
SCP0
SCR2
SCI DATA REGISTER
SCR0
PRE-
BAUD
÷ 4
÷ 16
T
SCALER DIVIDER
11-BIT
P
R
RECEIVE SHIFT REGISTER
T
S
CGMXCLK
DATA
RECOVERY
H
8
7
6
5
4
3
2
1
0
L
RxD
ALL 0s
BKF
RPF
M
RWU
SCRF
IDLE
WAKE
ILTY
WAKEUP
LOGIC
PEN
PTY
R8
PARITY
CHECKING
IDLE
ILIE
ILIE
SCRF
SCRIE
SCRIE
OR
OR
ORIE
ORIE
NF
NF
NEIE
NEIE
FE
FE
FEIE
FEIE
PE
PE
PEIE
PEIE
Figure 17-5. SCI Receiver Block Diagram
Technical Data
MC68HC908AS60 — Rev. 1.0
Serial Communications Interface (SCI)
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