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MC68HC908AS60CFU 参数 Datasheet PDF下载

MC68HC908AS60CFU图片预览
型号: MC68HC908AS60CFU
PDF下载: 下载PDF文件 查看货源
内容描述: HCMOS微控制器单元 [HCMOS Microcontroller Unit]
分类和应用: 微控制器外围集成电路时钟
文件页数/大小: 454 页 / 5714 K
品牌: FREESCALE [ Freescale ]
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Freescale Semiconductor, Inc.  
Serial Communications Interface (SCI)  
17.5.3.4 Framing Errors  
If the data recovery logic does not detect a logic 1 where the stop bit  
should be in an incoming character, it sets the framing error bit, FE, in  
SCS1. A break character also sets the FE bit because a break character  
has no stop bit. The FE bit is set at the same time that the SCRF bit is  
set.  
17.5.3.5 Baud Rate Tolerance  
A transmitting device may be operating at a baud rate below or above  
the receiver baud rate. Accumulated bit time misalignment can cause  
one of the three stop bit data samples to fall outside the actual stop bit.  
Then a noise error occurs. If more than one of the samples is outside the  
stop bit, a framing error occurs. In most applications, the baud rate  
tolerance is much more than the degree of misalignment that is likely to  
occur.  
As the receiver samples an incoming character, it resynchronizes the RT  
clock on any valid falling edge within the character. Resynchronization  
within characters corrects misalignments between transmitter bit times  
and receiver bit times.  
Slow Data Tolerance  
Figure 17-7 shows how much a slow received character can be  
misaligned without causing a noise error or a framing error. The slow  
stop bit begins at RT8 instead of RT1 but arrives in time for the stop  
bit data samples at RT8, RT9, and RT10.  
MSB  
STOP  
RECEIVER  
RT CLOCK  
DATA  
SAMPLES  
Figure 17-7. Slow Data  
Technical Data  
MC68HC908AS60 — Rev. 1.0  
Serial Communications Interface (SCI)  
For More Information On This Product,  
Go to: www.freescale.com  
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