Freescale Semiconductor, Inc.
Operating Modes and On-Chip Memory
EPROM, EEPROM and CONFIG register
EXCOL — Select extra columns
1 = User array disabled; extra column selected.
0 = User array selected.
The extra column may be accessed at bit 7; addresses use bits 11–5,
bits 4–0 must be ones. The EXCOL bit always reads zero in normal
modes and may be read or written only in special modes.
EXROW — Select extra rows
1 = User array disabled; extra rows selected.
0 = User array selected.
There are four extra rows (two in each block). Addresses use bits 6–0,
bits 11–7 must be zeros. (The high nibble determines which 16k block
is accessed.) The EXROW bit always reads zero in normal modes
and may be read or written only in special modes.
EPGM — EPROM program command
1 = Programming voltage (VPPE) switched to the EPROM array.
0 = Programming voltage (VPPE) disconnected from the EPROM
array.
This bit can be read at any time, but may only be written if ELAT is set.
NOTE: If ELAT = 0 (normal operation) then EPGM = 0 (programming voltage
disconnected).
3.6.1.2 EPROM programming
The EPROM may be programmed and verified in software, via the MCU,
using the following procedure. The ROMON bit in the CONFIG register
should be set. On entry, A contains the data to be programmed and X
contains the EPROM address.
EPROG
LDAB
STAB
STAA
LDAB
STAB
JSR
#$20
$102B
$0, X
#$21
$102B
DLYEP
$102B
Set ELAT bit (PGM=0) to enable EPROM latches.
Store data to EPROM address
Set EPGM bit, with ELAT=1, to enable prog. voltage
Delay 2–4 ms
Turn off programming voltage and set to READ mode
CLR
With this method, the EPROM is programmed by software while in the
MC68HC11P2 — Rev 1.0
Technical Data
Operating Modes and On-Chip Memory
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