Freescale Semiconductor, Inc.
Operating Modes and On-Chip Memory
utility can be used. To use the resident utility, bootload a three-byte
program consisting of a single jump instruction to $BF00. $BF00 is the
starting address of a resident EPROM programming utility. The utility
program sets the X and Y index registers to default values, then receives
programming data from an external host and puts it in EPROM. The
value in IX determines programming delay time. The value in IY is a
pointer to the first address in EPROM to be programmed (default =
$D000). When the utility program is ready to receive programming data,
it sends the host an $FF character; then it waits. When the host sees the
$FF character, the EPROM programming data is sent, starting with
location $D000. After the last byte to be programmed is sent and the
corresponding verification data is returned, the programming operation
is terminated by resetting the MCU.
3.6.2 EEPROM
The 640-byte on-board EEPROM is initially located from $0D80 to
$0FFF after reset in all modes. It can be mapped to any other 4k
boundary by writing to the INIT2 register. The EEPROM is enabled by
the EEON bit in the CONFIG register. Programming and erasing is
controlled by the PPROG register.
Unlike information stored in ROM, data in the 640 bytes of EEPROM can
be erased and reprogrammed under software control. Because
programming and erasing operations use an on-chip charge pump
driven by VDD, a separate external power supply is not required.
An internal charge pump supplies the programming voltage. Use of the
block protect register (BPROT) prevents inadvertent writes to (or erases
of) blocks of EEPROM (see BPROT — Block protect register). The
CSEL bit in the OPTION register selects an on-chip oscillator clock for
programming and erasing while operating at frequencies below 2MHz.
Refer to Resets and Interrupts.
In special modes there two extra rows and columns of EEPROM, which
are used for factory testing. Endurance and data retention specifications
do not apply to these cells.
Technical Data
MC68HC11P2 — Rev 1.0
Operating Modes and On-Chip Memory
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