Bus Signal Timing
Figure 18 provides the timing for the external bus controlled by the UPM.
CLKOUT
B8
A[0:31]
B31a
B31d
B31c
B31b
B31
CSx
B34
B34a
B34b
B32a B32d
B32c
B32b
B32
BS_A[0:3]
B35 B36
B35a
B33a
B35b
B33
GPL_A[0:5],
GPL_B[0:5]
Figure 18. External Bus Timing (UPM Controlled Signals)
MPC875/MPC870 Hardware Specifications, Rev. 3.0
33
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Freescale Semiconductor