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DSP56301VF100 参数 Datasheet PDF下载

DSP56301VF100图片预览
型号: DSP56301VF100
PDF下载: 下载PDF文件 查看货源
内容描述: 24位数字信号处理器 [24-Bit Digital Signal Processor]
分类和应用: 外围集成电路数字信号处理器时钟
文件页数/大小: 124 页 / 2296 K
品牌: FREESCALE [ Freescale ]
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Signals/Connections  
Signal Name  
Table 1-11. Host Interface (Continued)  
State During  
Type  
Signal Description  
Reset  
HTRDY  
HDBEN  
PB20  
Input/  
Output  
Tri-stated  
Host Target Ready  
When the HI32 is programmed to interface with a PCI bus and the HI function  
is selected, this is the Host Target Ready signal.  
Output  
Host Data Bus Enable  
When HI32 is programmed to interface with a universal, non-PCI bus and the  
HI function is selected, this is the Host Data Bus Enable signal.  
Input or Output  
Port B 20  
When the HI32 is configured as GPIO through the DCTR, this signal is  
individually programmed through the HI32 DIRH.  
This input is 5 V tolerant.  
HIRDY  
HDBDR  
PB21  
Input/  
Output  
Tri-stated  
Tri-stated  
Tri-stated  
Host Initiator Ready  
When the HI32 is programmed to interface with a PCI bus and the HI function  
is selected, this is the Host Initiator Ready signal.  
Output  
Host Data Bus Direction  
When HI32 is programmed to interface with a universal, non-PCI bus and the  
HI function is selected, this is the Host Data Bus Direction signal.  
Input or Output  
Port B 21  
When the HI32 is configured as GPIO through the DCTR, this signal is  
individually programmed through the HI32 DIRH.  
This input is 5 V tolerant.  
HDEVSEL  
HSAK  
Input/  
Output  
Host Device Select  
When the HI32 is programmed to interface with a PCI bus and the HI function  
is selected, this is the Host Device Select signal.  
Output  
Host Select Acknowledge  
When HI32 is programmed to interface with a universal, non-PCI bus and the  
HI function is selected, this is the Host Select Acknowledge signal.  
PB22  
Input or Output  
Port B 22  
When the HI32 is configured as GPIO through the DCTR, this signal is  
individually programmed through the HI32 DIRH.  
This input is 5 V tolerant.  
HLOCK  
HBS  
Input  
Host Lock  
When the HI32 is programmed to interface with a PCI bus and the HI function  
is selected, this is the Host Lock signal.  
Input  
Host Bus Strobe  
When HI32 is programmed to interface with a universal, non-PCI bus and the  
HI function is selected, this is the Host Bus Strobe Schmitt-trigger signal.  
PB23  
Input or Output  
Port B 23  
When the HI32 is configured as GPIO through the DCTR, this signal is  
individually programmed through the HI32 DIRH.  
This input is 5 V tolerant.  
DSP56301 Technical Data, Rev. 10  
1-12  
Freescale Semiconductor  
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