Freescale Semiconductor, Inc.
MCF5206e Overview
watchdog timer and several bus monitors. In addition, common system functions such as chip-selects,
interrupt control, bus arbitration and IEEE 1149.1 Test (JTAG) support are included.
A sophisticated debug interface supports both background-debug mode and real-time trace. The interface is
common to all ColdFire-based processors and allows emulator support across the entire ColdFire family.
1.1 MCF5206e Overview
This section gives a brief overview of the MCF5206e processor. Figure 1 is a block diagram of the
MCF5206e processor.
.
DRAM
DRAM
Control
Clock
Input
Clock
JTAG
Controller
Chip
Chip
Selects
JTAG
Interface
Selects
Interrupt
Controller
Interrupt
Support
External
Bus
Interface
External
Bus
4KByte
ICache
Parallel
Port
Parallel
Interface
Serial
8KByte
SRAM
DUART
Timers
Interface
Timer
Support
BOM
Interface
Debug Module
M-Bus
Interface
M-Bus
Module
Coldfire
Core
DMA
DMA
Control
Controller
Figure 1. MCF5206e Block Diagram
1.1.1 Features List
The following are the primary features of the MCF5206e integrated processor:
•
ColdFire Version 2 core
— Variable-length RISC
— 32-bit internal address bus with 28-bit external bus; chip select and DRAM decoding use
internal 32 bit
— 32-bit data base
2
MCF5206e Integrated ColdFire® Microprocessor Product Brief
MOTOROLA
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