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SE—Single-Address Enable
This bit is implemented for future MC683xx family compatibility.
1 = In single-address mode, the external data bus is driven during a DMA transfer.
0 = In single-address mode, the external data bus remains in a high-impedance state
during a DMA transfer (used for intermodule DMA).
In dual-address mode, the SE bit has no effect.
Bit 11—Reserved
ISM2–ISM0—Interrupt Service Mask
These bits contain the interrupt service mask level for the channel. When the interrupt
service level on the IMB is greater than the interrupt service mask level, the DMA
vacates the bus and negates BR until the interrupt service level is less than or equal to
the interrupt service mask level.
NOTE
When the CPU32 status register (SR) interrupt priority mask
bits I2–I0 are at a higher level than the DMA ISM bits, the DMA
channel will not start. The channel will begin operation when
the level of the SR I2–I0 bits is less than or equal to the level of
the DMA ISM bits.
SUPV—Supervisor/User
The value of this bit has no effect on registers permanently defined as supervisor-only
access.
1 = The DMA channel registers defined as supervisor/user reside in supervisor data
space and are only accessible from supervisor programs.
0 = The DMA channel registers defined as supervisor/user reside in user data space
and are accessible from either supervisor or user programs.
MAID—Master Arbitration ID
These bits establish bus arbitration priority level among modules that have the capability
of becoming bus master. For the MC68340, the MAID bits are used to arbitrate between
DMA channel 1 and channel 2. If both channels are programmed with the same MAID
level, channel 1 will have priority. These bits are implemented for future MC683xx
Family compatibility. In the MC68340, only the SIM and the DMA can be bus masters.
However, future versions of the MC683xx Family may incorporate other modules that
may also be bus masters. For these devices, the MAID bits will be required. For the
MAID bits, zero is the lowest priority and seven is the highest priority.
IARB — Interrupt Arbitration ID
Each module that generates interrupts has an IARB field. These bits are used to
arbitrate for the bus in the case that two or more modules simultaneously generate an
interrupt at the same priority level. No two modules can share the same IARB value.
MOTOROLA
MC68340 USER’S MANUAL
6- 25
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