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68HC912DG128PV8 参数 Datasheet PDF下载

68HC912DG128PV8图片预览
型号: 68HC912DG128PV8
PDF下载: 下载PDF文件 查看货源
内容描述: M68HC12微控制器 [M68HC12 Microcontrollers]
分类和应用: 微控制器外围集成电路时钟
文件页数/大小: 452 页 / 3509 K
品牌: FREESCALE [ Freescale ]
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Freescale Semiconductor, Inc.  
Pinout and Signal Descriptions  
Port Signals  
Table 3-3. Port Description Summary  
Pin Numbers Data Direction  
Port Name  
Register  
(Address)  
Description  
112-pin  
Port A  
PA[7:0]  
In/Out  
DDRA ($0002)  
Port A and port B pins are used for address and data in  
expanded modes. The port data registers are not in the  
address map during expanded and peripheral mode  
operation. When in the map, port A and port B can be  
read or written any time.  
64-57  
Port B  
PB[7:0]  
In/Out  
DDRB ($0003)  
31–24  
DDRA and DDRB are not in the address map in expanded  
or peripheral modes.  
Port AD1  
PAD1[7:0]  
84/82/80/78/7  
6/74/72/70  
In  
In  
Analog-to-digital converter 1 and general-purpose I/O.  
Analog-to-digital converter 0 and general-purpose I/O.  
Port AD0  
PAD0[7:0]  
83/81/79/77/7  
5/73/71/69  
Port CAN1  
PCAN1[1:0]  
PCAN1[1] Out PCAN1[1:0] are used with the MSCAN1 module and  
PCAN1[0] In cannot be used as general purpose I/O.  
PCAN0[1] Out PCAN0[1:0] are used with the MSCAN0 module and  
102–103  
104–105  
98–101  
Port CAN0  
PCAN0[1:0]  
PCAN0[0] In  
cannot be used as general purpose I/O.  
Port IB  
PIB[7:4]  
In/Out  
DDRIB ($00E7)  
General purpose I/O. PIB[7:6] are used with the I-Bus  
module when enabled.  
Port IB  
PIB[3:2]  
In/Out  
DDRIB ($00E7)  
102–103  
General purpose I/O  
PE[1:0] In  
PE[7:2] In/Out  
DDRE ($0009)  
Port E  
PE[7:0]  
Mode selection, bus control signals and interrupt service  
request signals; or general-purpose I/O.  
36–39, 53–56  
Port K  
PK[7,3:0]  
13,  
108-111  
In/Out  
DDRK ($00FD)  
Page index emulation signals in expanded or peripheral  
mode or general-purpose I/O.  
Port P  
PP[3:0]  
112,  
1–3  
In/Out  
DDRP ($0057)  
General-purpose I/O. PP[3:0] are used with the pulse-width  
modulator when enabled.  
Port S  
PS[7:0]  
In/Out  
DDRS ($00D7)  
Serial communications interfaces 1 and 0 and serial  
peripheral interface subsystems; or general-purpose I/O.  
96–89  
General-purpose I/O when not enabled for input capture  
and output compare in the timer and pulse accumulator  
subsystem.  
Port T  
PT[7:0]  
In/Out  
DDRT ($00AF)  
18–15, 7–4  
MC68HC912DG128 — Rev 3.0  
Technical Data  
Pinout and Signal Descriptions  
For More Information On This Product,  
Go to: www.freescale.com  
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