Freescale Semiconductor, Inc.
Pinout and Signal Descriptions
3.5.14 Port T
This port provides eight general-purpose I/O pins when not enabled for
input capture and output compare in the timer and pulse accumulator
subsystem. The TEN bit in the TSCR register enables the timer function.
The pulse accumulator subsystem is enabled with the PAEN bit in the
PACTL register.
Register DDRT determines pin direction of port T when used for general-
purpose I/O. When DDRT bits are set, the corresponding pin is
configured for output. On reset the DDRT bits are cleared and the
corresponding pin is configured for input.
When the PUPT bit in the TMSK2 register is set, all input pins are pulled
up internally by an active pull-up device. Pull-ups are disabled after
reset.
Setting the RDPT bit in the TMSK2 register configures all port T outputs
to have reduced drive levels. Levels are at normal drive capability after
reset. The TMSK2 register can be read or written anytime after reset
Refer to Enhanced Capture Timer.
Technical Data
MC68HC912DG128 — Rev 3.0
Pinout and Signal Descriptions
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