Freescale Semiconductor, Inc.
Pinout and Signal Descriptions
configured for output. On reset the DDRIB bits are cleared and the
corresponding pin is configured for input.
When the PUPIB bit in the IBPURD register is set, all input pins are
pulled up internally by an active pull-up device. Pull-ups are disabled
after reset, except for input ports 0 through 3, which are always on
regardless of PUPIB bit.
Setting the RDPIB bit in the IBPURD register configures all port IB
outputs to have reduced drive levels. Levels are at normal drive
capability after reset. The IBPURD register can be read or written
anytime after reset. Refer to section Inter-IC Bus.
3.5.10 Port AD1
This port is an analog input interface to the analog-to-digital subsystem
and used for general-purpose input. When analog-to-digital functions
are not enabled, the port has eight general-purpose input pins,
PAD1[7:0]. The ADPU bit in the ATD1CTL2 register enables the A/D
function.
Port AD1 pins are inputs; no data direction register is associated with this
port. The port has no resistive input loads and no reduced drive controls.
Refer to MSCAN Controller.
3.5.11 Port AD0
This port is an analog input interface to the analog-to-digital subsystem
and used for general-purpose input. When analog-to-digital functions are
not enabled, the port has eight general-purpose input pins, PAD0[7:0].
The ADPU bit in the ATD0CTL2 register enables the A/D function.
Port AD0 pins are inputs; no data direction register is associated with this
port. The port has no resistive input loads and no reduced drive controls.
Refer to MSCAN Controller.
Technical Data
MC68HC912DG128 — Rev 3.0
Pinout and Signal Descriptions
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