Freescale Semiconductor, Inc.
Technical Data — MC68HC912DG128
Section 4. Registers
4.1 Contents
4.2
Register Block. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .63
4.2 Register Block
The register block can be mapped to any 2K byte boundary within the
standard 64K byte address space by manipulating bits REG[15:11] in
the INITRG register. INITRG establishes the upper five bits of the
register block’s 16-bit address. The register block occupies the first 1K
byte of the 2K byte block. Default addressing (after reset) is indicated in
the table below. For additional information refer to General Description.
MC68HC912DG128 — Rev 3.0
Technical Data
Registers
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