Freescale Semiconductor, Inc.
Clock Functions
RTBYP — Real Time Interrupt Divider Chain Bypass
Write not allowed in normal modes, anytime in special modes. Read
anytime.
0 = Divider chain functions normally.
1 = Divider chain is bypassed, allows faster testing (the divider
chain is normally XCLK divided by 213, when bypassed
becomes XCLK divided by 4).
RTR2, RTR1, RTR0 — Real-Time Interrupt Rate Select
Read and write anytime.
Rate select for real-time interrupt. The clock used for this module is
the XCLK.
Table 11-4. Real Time Interrupt Rates
Time-Out Period Time-Out Period Time-Out Period Time-Out Period
RTR2 RTR1 RTR0 Divide X By:
X = 125 KHz
X = 500 KHz
X = 2.0 MHz
X = 8.0 MHz
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
OFF
213
214
215
216
217
218
219
OFF
OFF
OFF
OFF
65.536 ms
16.384 ms
4.096 ms
1.024 ms
131.72 ms
263.44 ms
526.88 ms
1.05 s
32.768 ms
65.536 ms
131.72 ms
263.44 ms
526.88 ms
1.05 s
8.196 ms
16.384 ms
32.768 ms
65.536 ms
131.72 ms
263.44 ms
2.048 ms
4.096 ms
8.196 ms
16.384 ms
32.768 ms
65.536 ms
2.11 s
4.22 s
Bit 7
RTIF
0
6
5
0
0
4
0
0
3
0
0
2
0
0
1
0
0
Bit 0
0
0
0
0
RESET:
RTIFLG — Real Time Interrupt Flag Register
$0015
RTIF — Real Time Interrupt Flag
This bit is cleared automatically by a write to this register with this bit
set.
0 = Time-out has not yet occurred.
1 = Set when the time-out period is met.
Technical Data
MC68HC912DG128 — Rev 3.0
Clock Functions
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