Freescale Semiconductor, Inc.
List of Figures
19-5 STOP Recovery Timing Diagram . . . . . . . . . . . . . . . . . . . . . .397
19-6 WAIT Recovery Timing Diagram . . . . . . . . . . . . . . . . . . . . . .398
19-7 Interrupt Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . .399
19-8 Port Read Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . .400
19-9 Port Write Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . .400
19-10 Multiplexed Expansion Bus Timing Diagram . . . . . . . . . . . . .402
A) SPI Master Timing (CPHA = 0) . . . . . . . . . . . . . . . . . . . . .404
B) SPI Master Timing (CPHA = 1) . . . . . . . . . . . . . . . . . . . . .404
19-11 SPI Timing Diagram (1 of 2) . . . . . . . . . . . . . . . . . . . . . . . . . .404
19-11 A) SPI Slave Timing (CPHA = 0) . . . . . . . . . . . . . . . . . . . . . .405
19-11 B) SPI Slave Timing (CPHA = 1) . . . . . . . . . . . . . . . . . . . . . .405
19-12 SPI Timing Diagram (2 of 2) . . . . . . . . . . . . . . . . . . . . . . . . . .405
MC68HC912DG128 — Rev 3.0
Technical Data
List of Figures
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