Freescale Semiconductor, Inc.
Technical Data — MC68HC912DG128
Section 11. Clock Functions
11.1 Contents
11.2 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .155
11.3 Clock Sources. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .156
11.4 Phase-Locked Loop (PLL) . . . . . . . . . . . . . . . . . . . . . . . . . . .157
11.5 Acquisition and Tracking Modes. . . . . . . . . . . . . . . . . . . . . . .159
11.6 Limp-Home and Fast STOP Recovery modes . . . . . . . . . . . .161
11.7 System Clock Frequency formulas. . . . . . . . . . . . . . . . . . . . .179
11.8 Clock Divider Chains . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .180
11.9 Computer Operating Properly (COP) . . . . . . . . . . . . . . . . . . .184
11.10 Real-Time Interrupt. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .184
11.11 Clock Monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .184
11.12 Clock Function Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . .185
11.2 Introduction
Clock generation circuitry generates the internal and external E-clock
signals as well as internal clock signals used by the CPU and on-chip
peripherals. A clock monitor circuit, a computer operating properly
(COP) watchdog circuit, and a periodic interrupt circuit are also
incorporated into the 68HC(9)12DG128.
MC68HC912DG128 — Rev 3.0
Technical Data
Clock Functions
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